Targeting the MIPS

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The Omega2 series of IoT devices have a MIPS32 processor in an attractively small and lightweight package, running a minimal version of Linux called OpenWRT that is often used as firmware for wireless routers. Perhaps the existence of this convenient platform will provide the impetus to make a compiler targetting the MIPS.

  • You could retarget the Lab 4 compiler from the Compilers course, aiming to adapt the existing code so as much of it as possible can be shared by back ends for the ARM32 and the MIPS. A chapter of the (otherwise almost impenetrable) book, A retargetable C compiler: design and implementation by Fraser and Hanson, gives helpful information and a machine grammar for the MIPS.
  • Alternatively, you could work on a JIT translator for Keiko (as used for the Oxford Oberon Compiler) along the lines of the existing JITs for x86/amd64 and ARM32. This idea might be complicated by the lack of a floating point unit on the Omega2, but it would be possible to copy what is done (via subroutine calls or emulation) by the Omega2 C compiler. The Keiko JIT has a portability interface based on assembly code for an invented, idealised RISC(Reduced Instruction Set Computer) A style of computer design where there are multiple, identical registers, arithmetic instructions that operate between registers, and separate load and store instructions with a limited set of addressing modes. machine that fits well with the MIPS, so the task ought to be manageable. The work would include writing a dynamic assembler that would generate MIPS instructions in binary format, needing a result correct down to the last bit.

Work on either of these options would be aided by the existence of a MIPS emulator as part of QEMU, and a GCC-based cross compiler that runs under Linux on x86 machines. A debugging build using QEMU of the Keiko JIT for ARM already exists and can provide a guide.

All of the above could apply to the AARM64 architecture too, if we can find a stable hardware platform to act as a motivation. The RPi would do, given a usable Linux port that runs in 64 bit mode.

Keiko on MIPS

It's possible to build the Keiko bytecode interpreter under Debian/x86 using a MIPS cross-compiler, then run it using QEMU. It's also possible to install the OpenWRT build environment and use its cross-compiler to generate the flavour of MIPS code needed by the Omega2 and link with the appropriate C library. The resulting interpreter also runs on QEMU, and can be copied to the Omega2 and runs there. Thirdly, it's possible to build OBC on the Omega2+, after installing an SD card and building prerequisite software from source.

Generic MIPS build of Keiko

  • Use Debian and install the packages gcc-mipsel-linux-gnu and qemu-user. (It's mipsel for the little-endian variant of MIPS, which is the one used in the Omega2.)
  • Clone the OBC-3 repository from Bitbucket.
  • Configure and build OBC, then change to the mipstest directory and build there. The final step of the build is to run a small test case under QEMU.

OpenWRT toolchain

Building on Omega2

  • Use an Omega2+ with the 128MB RAM and the SD card slot. A 4GB SD card will be big enough.
  • Migrate the root file system onto the SD card:
  • Enable more package repositories, and install the C compiler and Make.
  • Install the following from source:
    • Mercurial.
    • TCL (needed to build Keiko). Disable all add-on packages by removing the contents of the pkgs directory in the source.
    • OCaml.
  • Clone the OBC repo, configure with --disable-debugger and build. Be patient!


  • The architecture manual describes the MIPS instruction set. Apparently, the Omega2 implements release 2 of the MIPS32 instruction set, but without the floating point instructions.
  • A page describing the soft float library routines that come with GCC.
  • The book See MIPS Run is a valuable guide to all things MIPS (LMGTFY).
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