annotate lab4/regs.mli @ 0:bfdcc3820b32

Basis
author Mike Spivey <mike@cs.ox.ac.uk>
date Thu, 05 Oct 2017 08:04:15 +0100
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mike@0 1 (* lab4/regs.mli *)
mike@0 2 (* Copyright (c) 2017 J. M. Spivey *)
mike@0 3
mike@0 4 open Target
mike@0 5
mike@0 6 (* |init| -- initialise register state *)
mike@0 7 val init : unit -> unit
mike@0 8
mike@0 9 (* |is_free| -- test if register is free *)
mike@0 10 val is_free : reg -> bool
mike@0 11
mike@0 12 (* |get_regvars| -- reserve register variables *)
mike@0 13 val get_regvars : int -> unit
mike@0 14
mike@0 15 (* |alloc_reg| -- allocate any register *)
mike@0 16 val alloc_reg : unit -> reg
mike@0 17
mike@0 18 (* |get_reg| -- use specified register or allocate one if R_any *)
mike@0 19 val get_reg : reg -> reg
mike@0 20
mike@0 21 (* |reserve_reg| -- reserve a register *)
mike@0 22 val reserve_reg : reg -> unit
mike@0 23
mike@0 24 (* |release_reg| -- decrement reference count of register *)
mike@0 25 val release_reg : reg -> unit
mike@0 26
mike@0 27 (* |dump_regs| -- make one-line summary of register state *)
mike@0 28 val dump_regs : unit -> string
mike@0 29
mike@0 30
mike@0 31 (* Temps *)
mike@0 32
mike@0 33 (* |new_temp| -- allocate a temp with specified reference count *)
mike@0 34 val new_temp : int -> int
mike@0 35
mike@0 36 (* |inc_temp| -- increment refcount of a temp variable *)
mike@0 37 val inc_temp : int -> unit
mike@0 38
mike@0 39 (* |use_temp| -- use a temp variable *)
mike@0 40 val use_temp : int -> reg
mike@0 41
mike@0 42 (* |def_temp| -- define a temp variable *)
mike@0 43 val def_temp : int -> reg -> unit
mike@0 44
mike@0 45 (* |spill_temps| -- move any temps that use specified registers to safety *)
mike@0 46 val spill_temps : reg list -> unit
mike@0 47