File:Cortex-M0-generic-ug.pdf

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Image title	A generic User Guide for devices that implement the ARM Cortex-M0 processor, intended for end-users. The document includes descriptions of the 4GB unified memory map, the exception model and integral Nested Vectored Interrupt Controller (NVIC), and the implemented Thumb instruction set.
Author	ARM Limited
Short title	Cortex-M0 Devices Generic User Guide
Keywords	ARM, Cortex-M0, MCU, Cortex-M, microcontroller, User Guide, Thumb, Instruction Set, processor, CPU, 32-bit, microprocessor, low power, core peripherals, Nested Vector Interrupt Controller, NVIC, Real Time Operating System, RTOS, Memory Protection Unit, MPU, SysTick, system timer, power-saving, sleep mode, WIC, wakeup interrupt controller, DeepSleep, pwer-saving, integrated peripheral,von-Neumann, unified memory,highly deterministic, ARMv6-M
Software used	FrameMaker 8.0
Conversion programme	Acrobat Distiller 7.0 (Windows)
Encrypted	no
Page size	540 x 648 pts
Version of PDF format	1.4