The BBC micro:bit (Digital Systems)
This page is Grand Central for micro:bit hardware documentation. I have tried to include a copy of every document I used in developing the course, or at least a link to it. Where a local copy exists, a link to it is shown in the text below, and the source link is added at the end of the sentence. I have included copies and links in good faith, but copyright holders are welcome to email me and ask for material to be removed.
The micro:bit is best thought of as a system with three layers:
- The processor core is a Cortex-M0 developed by ARM.
- The microcontroller chip, an nRF51822 developed by Nordic Semiconductor, extends the core with a collection of peripheral interfaces.
- The micro:bit board, developed for the BBC, adds external components like buttons, lights, and an accelerometer and magnetometer on an I2C bus.
This page contains exclusively documentation of the micro:bit itself: for information on the tool setup for programming it, see the labs page and other pages linked to it.
The Cortex-M0 core is an ARM processor, with sixteen 32-bit registers and a RISC-style instruction set. Like other microcontroller-oriented versions of the ARM, it omits the standard 32-bit encoding of the instruction set, and executes only programs written in the more compact 16-bit Thumb encoding.
- ARM architecture reference manual for ARM-V6m, describing the Cortex-M0 instruction set (source).
- Quick reference card (source).
- Generic user guide for Cortex-M0 (source).
- Technical reference manual for Cortex-M0 (source).
- Some information on the strucuture of Cortex-M0 pipeline.
Note that the nRF51822 does not have a SysTick timer (you have to use one of the other timers instead), and does not have a Vector Table Offset Register (VTOR) for the interrupt controller, so that the vector table is always located in Flash at address 0.
See also ...
- A chart showing Thumb instruction encodings. To use this chart, begin with table [A] in the top left, and find the entry identified by the first hexadecimal digit of the instruction at the left, and the second digit at the top. This will either identify a specific instruction, with assembly language syntax given at the right of the table, or give you a reference to one of the other tables [B] to [E]. In each table, the first hex digits of the instruction are shown to the left to the table, and sometimes a further digit at the top. The notation r1 or r2 denotes a low register, one of
r7, while r/h1 denotes any register, including
pc. The notation
#4*imm8denotes an 8-bit immediate field whose (unsigned) value is multiplied by 4 – so it can express the values 0, 4, 8, ..., 1020. All immediate fields are unsigned, and all branch displacements are signed.
- A list of common instructions that will be provided as part of the exam paper.
- Geoffrey Brown's notes for a course similar to this one at Indiana University (source).
- The Definitive Guide to the ARM Cortex-M0, by Joseph Yiu (Newnes Elsevier, 2011). ISBN: 978-0-12-385477-3. (LMGTFY)
The nRF51822 contains an implementation of the processor core that runs with a 16MHz clock, together with 16MB of RAM and 256MB of read-only flash memory. It also contains several peripheral interfaces, including a UART, bus interfaces for I2C and SPI, a hardware random number generator, and a 2.4GHz radio interface. The processor has the single-cycle multiplier option.
- Product specification for the nRF51822, containing the mechanical and electrical parts of the datasheet (source).
- Reference manual for the nRF51822, containing detailed programming information for the peripheral interfaces (source).
- Product anomaly notices for the nRF51822: version 3.2, version 2.4.
- A sneak peek at the nRF58122 die.
- 25 LEDs, arranged in a 5x5 matrix. Electrically, the 25 LEDs are wired as a matrix with three rows and up to nine LEDs in each row, in a seemingly irregular pattern. Only one row can be used at a time, so displaying an arbitrary image requires patterns in the three rows to be illuminated in rapid succession, under processor control.
- two tactile switches, labelled A and B.
- a UART interface, connected to a host computer via USB.
- a 3-axis accelerometer chip MMA8653FC, connected to the nRF51822 via an I2C bus. Product page, datasheet (source).
- a 3-axis magnetometer chip MAG3110, connected to the same I2C bus. Product page, datasheet (source)
- Alternatively (on more recent boards), a single chip LSM303AGR with a different I2C address that combines an accelerometer and a magnetometer. Product page, datasheet.
There is also an edge connector that exposes some of the nRF51822 pins, including the I2C bus and an SPI bus, for connection of external components.
In addition, there are a number of test points on the board that give access to interesting signals, inluding the TX and RX lines of the UART.
In fact, the micro:bit board contains a second ARM microcontroller chip, an NXP (was Freescale (was Motorola)) KL26Z – more powerful than the nRF51822 – that provides the USB interface, as well as a voltage regulator for the 3.3V supply used by the rest of the board. It does its job invisibly, and we will not need to pay any attention to it. (But if you should short the 3.3V and ground terminals of the board, this is the chip that will get hot.)
The supplied software for the micro:bit itself has three layers.
- An instance of the MBED library.
- An additional layer of device drivers written by programmers at the University of Lancaster, including a process scheduler.
We shall use none of this software, but it is useful to plunder the source code (especially the Lancaster library) for concrete examples of device programming. The MBED library and the Lancaster library use C++ to provide wrappers for lower-level features, following the pattern of initialising the hardware by declaring an instance of the driver class. We avoid this, and instead prefer to work with the underlying code, which is in each case written in pure C.
- Datasheet for the IS31FL3731 I2C LED driver chip used on the scroll:bit add-on board.
- The irregular pattern helps to reduce the impression of flickering when the display is multiplexed; also, row 2 consists of seven LEDs in a hexagonal pattern, and we use that pattern for the abort sequence.
(Reduced Instruction Set Computer). A style of computer design where there are multiple, identical registers, arithmetic instructions that operate between registers, and separate load and store instructions with a limited set of addressing modes.
A single integrated circuit that contains a microprocessor together with some memory (usually both RAM for dynamic state and ROM for storing a persistent program) and peripheral interfaces.
An alternative instruction encoding for the ARM in which each instruction is encoded in 16 rather than 32 bits. The advantage is compact code, the disadvantage that only a selection of instructions can be encoded, and only the first 8 registers are easily accessible. In Cortex-M microcontrollers, the Thumb encoding is the only one provided.
A symbolic representation of the machine code for a program.
see Read-only memory.
(Universal Asynchronous Receiver/Transmitter). A peripheral interface that is able to send and receive characters serially, commonly used in the past for communication between a computer and an attached terminal. It is commonly used in duplex mode, with the transmitter of one device connected to the receiver of the other with one wire, and the receiver of the one connected to transmitter of the other with a different wire. The asynchronous part of the name refers to the fact that the transmitter and receiver on each wire do not share a common clock, but rely instead on the signalling protocol and precise timing to achieve synchronisation.