Thunder instruction set
Note: this needs updating with new spellings like LDCu, new opcodes like BNGEf, and to remove the RET instruction.
ADD reg, reg, imm Integer arithmetic ADD reg, reg, reg SUB reg, reg, imm SUB reg, reg, reg MUL reg, reg, imm MUL reg, reg, reg AND reg, reg, imm Bitwise logical operations AND reg, reg, reg OR reg, reg, imm OR reg, reg, reg XOR reg, reg, imm XOR reg, reg, reg NEG reg, reg Integer unary minus NOT reg, reg Bitwise negation SXT reg, reg Sign extend 16 bits to 32 LSH reg, reg, imm Logical shift left LSH reg, reg, reg RSH reg, reg, imm Arithmetic shift right RSH reg, reg, reg RSHU reg, reg, imm Logical shift right RSHU reg, reg, reg ROR reg, reg, imm Rotate right ROR reg, reg, reg BEQ reg, imm, lab Integer conditional branches BEQ reg, reg, lab BGEQ reg, imm, lab BGEQ reg, reg, lab BGT reg, imm, lab BGT reg, reg, lab BLEQ reg, imm, lab BLEQ reg, reg, lab BLT reg, imm, lab BLT reg, reg, lab BNEQ reg, imm, lab BNEQ reg, reg, lab BGEQU reg, imm, lab Unsigned conditional branches BGEQU reg, reg, lab BGTU reg, imm, lab BGTU reg, reg, lab BLEQU reg, imm, lab BLEQU reg, reg, lab BLTU reg, imm, lab BLTU reg, reg, lab JUMP lab Unconditional jump JUMP reg EQ reg, reg, imm Integer comparisons with boolean result EQ reg, reg, reg GEQ reg, reg, imm GEQ reg, reg, reg GT reg, reg, imm GT reg, reg, reg LEQ reg, reg, imm LEQ reg, reg, reg LT reg, reg, imm LT reg, reg, reg NEQ reg, reg, imm NEQ reg, reg, reg PREP imm Prepare procedure call CALL imm Perform procedure call CALL reg ARG imm Save outgoing argument ARG reg RET Return (removed in recent versions) GETARG reg, imm Fetch incoming argument MOV reg, imm Move to register MOV reg, lab MOV reg, reg LDC reg, imm Load character with sign extension LDC reg, reg LDC reg, reg, imm LDCU reg, imm Load character with zero extension LDCU reg, reg LDCU reg, reg, imm LDKW reg, imm Undocumented LDS reg, imm Load short with sign extension LDS reg, reg LDS reg, reg, imm LDSU reg, imm Load short with zero extension LDSU reg, reg LDSU reg, reg, imm LDW reg, imm Load word LDW reg, reg LDW reg, reg, imm STC reg, imm Store character STC reg, reg STC reg, reg, imm STS reg, imm Store short STS reg, reg STS reg, reg, imm STW reg, imm Store word STW reg, reg STW reg, reg, imm *** Floating Point ADDF freg, freg, freg Floating point arithmetic ADDD freg, freg, freg SUBF freg, freg, freg SUBD freg, freg, freg MULF freg, freg, freg MULD freg, freg, freg DIVF freg, freg, freg DIVD freg, freg, freg NEGF freg, freg Floating point negation NEGD freg, freg ZEROF freg Load zero into floating point register ZEROD freg BEQF freg, freg, lab Floating point conditional branches BEQD freg, freg, lab BGEQF freg, freg, lab BGEQD freg, freg, lab BGTF freg, freg, lab BGTD freg, freg, lab BLEQF freg, freg, lab BLEQD freg, freg, lab BLTF freg, freg, lab BLTD freg, freg, lab BNEQF freg, freg, lab BNEQD freg, freg, lab EQF reg, freg, freg Floating point comparisons with boolean result EQD reg, freg, freg GEQF reg, freg, freg GEQD reg, freg, freg GTF reg, freg, freg GTD reg, freg, freg LEQF reg, freg, freg LEQD reg, freg, freg LTF reg, freg, freg LTD reg, freg, freg NEQF freg, freg, freg NEQD freg, freg, freg CONVDF freg, freg Convert double to float CONVFD freg, freg Convert float to double CONVIF freg, reg Convert integer to float CONVID freg, reg Convert integer to double CONVFI reg, freg Convert float to integer CONVDI reg, freg Convert double to integer LDKW freg, imm Undocumented LDW freg, imm Floating point load LDW freg, reg LDW freg, reg, imm LDQ freg, imm Double precision load LDQ freg, reg LDQ freg, reg, imm STW freg, imm Floating point store STW freg, reg STW freg, reg, imm STQ freg, imm Double precision store STQ freg, reg STQ freg, reg, imm MOV freg, freg Move between registers MOV freg, reg MOV reg, freg
